MikroElektronika PIC Microcontrollers PIC18 Manuel d'utilisateur Page 9

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The process of arbitration is illustrated in Figure 9.9 by an example consisting of three
nodes having identifiers:
Node 1: 11100110011 Node 2: 11100111111 Node 3: 11100110001
Assuming the recessive level corresponds to 1 and the dominant level to 0, the
arbitration is performed as follows:
All the nodes start transmitting simultaneously, first sending SOF bits.
Then they send their identifier bits. The 8
th
bit of Node 2 is in the recessive
state, while the corresponding bits of Nodes 1 and 3 are in the dominant state.
Therefore Node 2 stops transmitting and returns to receive mode. The receiving
phase is indicated by a gray field.
The 10
th
bit of Node 1 is in the recessive state, while the same bit of Node 3 is
in dominant state. Thus Node 1 stops transmitting and returns to receive mode.
The bus is now left to Node 3, which can send its control and data fields freely.
Notably, the devices on the bus have no addresses. Instead, all the devices pick up all
the data on the bus, and every node must filter out the messages it does not want.
Bus
Node 3
Node 2
Node 1
Start of frame
1234567891011
Figure 9.9: Example CAN bus arbitration
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483Advanced PIC18 Projects—CAN Bus Projects
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